* ARM architected timer

ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which
provides per-cpu timers.

The timer is attached to a GIC to deliver its per-processor interrupts.

** Timer node properties:

- compatible : Should at least contain "arm,armv7-timer".

- interrupts : Interrupt list for secure, non-secure, virtual and
  hypervisor timers, in that order.

- clock-frequency : The frequency of the main counter, in Hz. Optional.

Example:

	timer {
		compatible = "arm,cortex-a15-timer",
			     "arm,armv7-timer";
		interrupts = <1 13 0xf08>,
			     <1 14 0xf08>,
			     <1 11 0xf08>,
			     <1 10 0xf08>;
		clock-frequency = <100000000>;
	};
